The fabrication of ICs involves the formation of features on a substrate that make up circuit components, such as transistors, resistors and capacitors. The devices are interconnected, enabling the ICs to perform the desired functions. An important aspect of the manufacturing of ICs is the need to provide planar surfaces using planarization techniques.
One technique used to planarize substrates is chemical mechanical polishing (CMP). CMP tools generally include a platen with a polishing pad and a chuck for holding a wafer in place. During polishing, the wafer surface to be planarized is pressed against the rotating polishing pad by the chuck. Slurry which includes small abrasive particles is provided between the wafer surface and the pad. The wafer may also be rotated and oscillated over the surface of the polishing pad.
Another technique for planarizing substrates is electro-chemical mechanical polishing (eCMP). Typically eCMP is used to polish metal layers. In eCMP, an electrical potential is applied to the wafer with an electrolytic planarizing liquid. Electropolishing is conducted under low pressure.
However, we have observed that in conventional planarizing processes for copper (Cu) interconnects, metal corrosion occurs. Such corrosion can be detrimental to reliability.
It is therefore desirable to reduce Cu corrosion resulting from polishing or planarization.